**Unit Exercise-2**

**(2 Marks questions)**

- Consider the circuit shown in figure below, if the diode used here has the V-I characteristic as in figure below, then the output waveform V
_{o}is - The rms value of a rectangular wave of period T, having a value of + V for a duartion T, (<T) and having -V for the duration, T – T
_{1}= T_{2}equals

(a) V

(b) T_{1} – T_{2}/ T V

(c) V /2

(d) T_{1}/T_{2} V

**For good stabilized biasing of the transistor of CE amplifier of figure, we should have**

(a) R_{E}/R_{B} <<1

(b) R_{E}/R_{B} >>1

(c) R_{B}/R_{E} <<1

(d) R_{B}/R_{E} <<1

- Discrete transistors T
_{1}and T_{2}having maximum collector current rating of 0.75 A, are connected in paraller as shown in the figure. this combination is treated as a single transistor to carry a total current of 1 A, when biased with self bias circuit. when the circuit is switched on, T_{1}draws 0.55 A and T_{2}draws 0.45 A. if the supply is kept on continuously, ultimately it is very likely that

(a) both T_{1} and T_{2} get dmage

(b) both T_{1} and T_{2} will be safe

(c) T_{1} will get damage and T_{2} will be safe

(d) T_{2} will get damage and T_{1} will be safe

- The secondary transformer voltage of the rectifier circuit shown below is V
_{S}= 60 sin 2 60_{t}V. each diode has a cut-in voltage V_{in}= 0.6 V the ripple voltage is to be no more than V_{rip}= 2V. The value of filter capacitor will be

(a) 48.8 uF

(b) 24.4 uF

(c) 32.2 uF

(d) 16.1 uF

- The input to full-wave rectifier shown below is V
_{I}= 120 sin 2 60_{t}V. The diode cut-in voltage is 0.7 V. if the output voltage cannot drop below 100 V, the required value of the capacitor is

(a) 61.2 uF

(b) 41.2 uF

(c) 20.6 uF

(d) 30.6 uF

- For the circuit shown below, diode cut-in voltage is V
_{in}= 0. the ripple voltage is to be no more than V_{RIP }= 4 V. the minimum load resistance, that can be connected to the output is

(a) 6.25 k

(b) 12.50 k

(c) 30 k

(d) none of these

- The JFET in the circuit shown in figure below has an I
_{DSS}= 10 mA and V_{P}= 5 V. The value of the resistance R_{S}for a drain current I_{DS}= 6.4 mA is

(a) 150

(b) 470

(c) 510

(d) 1 k

- In a transistor push-pull amplifier

(a) there is no DC present in the output

(b) there is no distortion in the output

(c) there are no even harmonics in the output

(d) there are no odd harmonics in the output

- In a multistage RC copled amplifier, the coupling capacitor

(a) limites the low frequency response

(b) limits the high frequency response

(c) dose not affect the frequency response

(d) blocks the DC component without affecting the frequency of response

- Negative feedback in amplifiers

(a) improves the signal to noise ratio at the input

(b) improves the signal to noise ratio at the output

(c) does not affect the signal to noise ration at the output

(d) reduces distortion

- The bandwidth of an n stage tuned amplifier with each state having a bandwidth of B, is given by

(a) B/ n

(b) B/n

(c) B 2^{1/n} -1

(d) B / 2^{1/N} – 1

- An n-p-n transistor has a beta cut-off frequency f
_{b}of 1 MHz, and common-emitter short circuit low frequency current gain B_{0}of 200. if unity gain frequency f_{r}and the alpha cut-off frequency f_{a}respectively, are

(a) 200 MHz, 201 MHz

(b) 200 MHZ, 199 MHz,

(c) 199 MHz, 200 MHz

(d) 201 MHz, 200 MHz,

14, The transfer characteristic for the precision rectifier circuit shown below is (assume ideal op-amp and practical diodes)

- In the circuit below, the diode is ideal. the voltage V is given by

(a) min (V_{I},1)

(b) max (V_{I},1)

(c) min (-V_{i},1)

(d) max (-V_{I},1)

- in the following astable multi-vibrator circuit, which properties of V
_{a}(t) depend on R_{2}?

(a) only the frequency

(b) only the amplitude

(c) both the amplitude and the frequency

(d) neither the amplitude nor the frequency

- A small signal source V
_{I}(t) = A cos 20t + B sin 10^{6}t is applied to a transistor amplifier as shown below. the transistor has B = 150 and h_{ie}= 3 k which expression best approximates V_{O}(t) ?

(a) V_{O} (t) = – 1500 (A cos 20t + B sin 10^{6} t)

(b) V_{O} (t) = – 150 (A cos 20t + B sin 10^{6} t)

(c) V_{O} (t) = – 1500 B sin 10^{6} t

(d) V_{O} (t) = – 150 B sin 10^{6} t

- For the circuit shown in the following figure, transistors M
_{1}and M_{2}are identical n-MOS transistors. assume that M_{2}is in saturation and the output is unloaded.

The current I_{G} is related to I_{blas }as

(a) I_{x }= I_{bias }+ I_{S}

(b) I_{x } = I_{bias}

(c) I_{x} = I_{bias }– I_{S}

(d) I_{x} = I_{bias }– (V_{CC – }V_{OUT}/R_{E})

- The measured transconductance g
_{m}of an n- MOS transistor operating in the linear region is plotted against the gate voltage V_{G}at constant drain voltage V_{D}which of the following figures represents the expected dependence of g_{m}on V_{G}? - Consider the following circuit using an ideal op-amp. the I – V, characteristics of the diode is described by the relation I = I
_{O}(e^{v/v}_{t}– 1) where V_{T}= 25 mV, I_{O}= 1 uA and V is the voltage across the diode (taken as positive for forward bias)

For an input voltage V_{I} = – 1V, the output voltage V_{O} is

(a) zero

(b) 0.1 v

(c) 0.7 v

(d) 1.1 v

- The op-amp circuit shown below represents a

(a) high – pass filter

(b) low-pass filter

(c) band-pass filter

(d) band-reject filter

- Two identical n-MOS transistors M
_{1}and M_{2}are connected as shown below. V_{bias }is chosen, so that both transistors are in saturation. the equivalent g_{m}of the pair is defined to be I_{OUT}/V_{I}at constant V_{OUT}.

The equivalent g_{m} of the pair is

(a) the sum of individual g_{m}‘s of the transistors

(b) the product of individual g_{m}‘s of the transistors

(c) nearly equal to the g_{m} of M_{1}

(d) nearly equal to g_{m}/g_{o} of M_{2}

- An astable multi-vibrator circuit using IC 555 timer is shown below in figure, assume that the circuit is oscillating steadily.

The voltage V_{C} across the capacitor varies between

(a) 3 v to 5 v

(b) 3 v to 6 v

(c) 3.6 v to 6 v

(d) 3.6 v to 5 v

- Consider the schmitt trigger circuit shown below. A triangular wave which goes from -12 v to 12 v is applied to the inverting input of the op-amp. assume that the output of the op-amp sings from + 15 v to – 15 v. the voltage at the non-inverting input switches between

(a) – 12 v and + 12 v

(b) – 7.5 v and + 7.5 v

(c) – 5 and + 5 v

(d) 0 v and 5 v

- For the op-amp circuit shown in the figure below, V
_{O}is

(a) – 2 v

(b) -1 v

(c) – 0.5 v

(d) 0.5 v

- For the BJT circuit shown in figure below, assume that the B of the transistor is very large and V
_{BE}= 0.7. the mode of operation of the BJT is

(a) cut-off

(b) saturation

(c) normal active

(d) reverse active

- In the op-amp circuit shown in figure below assume that the diode current follows the equation I = I
_{S}exp (V/V_{T}) for V_{I}= 2V, V_{O}= V_{O1}and for V_{I}= 4 V, V_{O}= V_{O2}. the relationship between V_{O1}and V_{O2}is

(a) V_{O2} = 2 V_{O1}

(b) V_{O2} E^{2}V_{O1}

(c) V_{O2} = V_{O1} in 2

(d) V_{O1} – V_{O2} = V_{T} In 2

- In the CMOS inverter circuit shown in figure below, if the transconductance parameters of the n-MOS and p-MOS transistors are

K_{n} = K_{p} = u_{n} C_{ox} W_{n}/L_{n} = u_{p} C_{ox} W_{p} /L_{p} = 40 u/A/V^{2} and their threshold voltages are V_{TH},_{N} =|V_{th, p}| = 1V, the current / is

(a) zero

(b) 25 uA

(c) 45 uA

(d) 90 uA

- For the zener diode shown in the figure below, the zener voltage at knee is 7 V, the knee current is negligible and the zener dynamic resistance is 10 if the input voltage (v
_{i}) range is from 10 to 16 v, the output voltage (V_{O}) ranges from

(a) 7.00 V to 7.29 V

(b) 7.14 V to 7. 29 V

(c) 7.14 V to 7.43 V

(d) 7.29 V to 7.43 V

- For the circuit shown in the following figure, the capacitor C is initially uncharged. At t = 0, the switch S is closed. the voltage V
_{C}across the capacitor a t = 1 ms is

(in the figure shown above, the op-amp is supplied with + 15 V and the ground has been shown by the symbol v).

(a) zero

(b) 6.3 v

(c) 9.45 v

(d) 10 v

- For the circuit shown below, assume that the zener diode is ideal with a breakdown voltage of 6 v. the waveform observed across R is
- For an n-p-n transistor connected as shown in figure below, V
_{be}= 0.7 v. given that reverse saturation current of the junction at room temperture 300 k is 10^{-13}A, the emitter current is

(a) 30 mA

(b) 39 mA

(c) 49 mA

(d) 20 mA

- The voltage V
_{O}indicated in figure below has been measured by an ideal voltmeter. which of the following can be calculated?

(a) bias current of the invertnig input only

(b) bias current of the inverting and non-inverting inputs

(c) input offset current only

(d) both the bias current and the input offset current

- The op-amp circuit shown in figure below is a filter. the type of filter and its cut-off frequency are respectively

(a) high-pass, 1000 rad/s

(b) low-pass, 1000 rad/s

(c) high-pass, 1000 rad/s

(d) low-pass, 1000 rad/s

- In an ideal differential amplifer shown in figure below, a large value of R
_{B}

(a) increases both the differential and common mode gains

(b) increases the common mode gain only

(c) decreases the differential mode gain only

(d) decreases the common mode gain only

- For an n-channel MOSFET and its transfer curve shown in figure below, the threshold voltage is

(a) 1 v and the device is in active region

(b) -1 v and the device is in saturation region

(c) 1 v and the device is in saturation region

(d) – 1 v and the device is in active region

- The circuit using a BJT with B = 50 and V
_{BE}= 0.7 v shown in figure. the base current I_{b}and collector voltage V_{c}are, respectively

(a) 43 uA and 11.4 V

(b) 40 uA and 16 V

(c) 45 uA and 11 V

(d) 50 uA and 10 V

- The zener diode in the regulator circuit shown in figure has a zener voltage of 5.8 v and a zener knee current of 0.5 mA. the maximum load current drawn from this circuit ensuring proper functioning over the input voltage range between 20 and 30 v, is

(a) 23.7 mA

(b) 14.2 mA

(c) 13.7 mA

(d) 24.2 mA

- Given, the ideal operational amplifier circuit shown in figure indicates the correct transfer characteristics assuming ideal diode with zero cut-in voltage.
- The drain of an n-channel MOsfet is shorted to the gate, so that v
_{gs}= V_{ds}the threshold voltage (V_{T}) of MOSFET is 1 V. if the drain current (I_{d}) is 1 mA for V_{gs}= 2 V, then for V_{gs}= 3 V, I_{D}is

(a) 2 mA

(b) 3 mA

(c) 9 mA

(d) 4 mA

- Assuming that the B of the transistor is extremely large and V
_{BE}= 0.7 V, I_{C}and V_{CE}in the circuit shown in figure, are

(a) I_{C} = 1 mA, V_{CE} = 4.7 V

(b) I_{C} = 0.5 mA, V_{CE} = 3.75 V

(c) I_{C} = 1 mA , V_{CE} = 2.5 V

(d) I_{C} = 0.5 mA, V_{CE} = 3.9 V

- A bipolar transistor is operating in the active region with a collector current of 1 mA. assuming that the B of the transistor is 100 and the thermal voltage (V
_{T}) is 25 mV, the transconductance (g_{m}) and the input resistance (r_{i}) of the transistor in the common emitter configuration are

(a) g_{m} = 25 mA/V and r_{i} = 15.625 k

(b) g_{m} = 40 mA/ V and r_{i} = 4.0 k

(c) g_{m} = 25 mA/ V and r_{i} = 2.5 k

(d) g_{m} = 40 mA/ V and r_{i} = 2.5 k

- The value of c required for sinusoidal oscillations of frequency 1 kHz in the given circuit, is

(a) 1/2 uF

(b) 2 uF

(c) 1/2 6uF

(d) 2/6 uF

- In the op-amp circuit given in figure the load current I
_{L}is

(a) – V_{S}/R_{2}

(b) V_{S}/R_{2}

(c) -V_{S}/R_{L}

(d) V_{S}/R_{L}

**answer key with solution **

- (c) V
_{L}< 0.5 V, V_{O}= 0

V_{L} > 0.5 V, V_{O} = 600 /600 + 300 (V_{L} – 0.5)

V_{O} – 2/3 (V_{L} – 0.5)

- (a)
- (b) For biasing stability R
_{1}||R_{2}= R_{B}

S = R_{B}/R_{E} >>> (B + 1)

S = B + 1

For R_{B}/R_{E} >>> 1, then

S = B + 1 ( 1/B + 1) = 1

Here, R_{B}/R_{E} << 1, So, R_{E}/R_{B} >> 1

- (c) T
_{1}T_{2}draw total current = 1 amp

when on, T_{1} draws 0.55 A

T_{2} draws 0.45 A

T_{1} is heated more than T_{2}

Finally, I_{1} = 1A, I_{2} = 0

T_{1} is demaged, T_{2} safe.

- (b) V
_{S}= 60 sin 2 60t V

V_{max} = 60 – 1.4 = 58.6 V

C = V_{max}/2fRV_{rip} = 58.6 / 2(60)10 x 10^{3} x 2 = 24.4 uF

- (c) Full wave rectifier

V_{S} = V_{t} = 120 sin 2 60t V

V_{max} = 120 – 0.7 = 119.3 V

V_{rip} = 119.3 -100 = 19.3 V

C = V_{max}/2fkV_{rip} = 119.3 /2(60)2.5 x 10^{3} x 14.4 = 20.6 uF

- (a) V
_{rip}= V_{max}/fR_{L}C

R_{L} = V_{MAX}/fCV_{rip} = 60 x 50 x 10^{-5} x 4 = 6.25 k

- (a) I
_{D}= I_{DSS}[1 – V_{GS}/V_{P}]^{2}

6.4/10 = [1 – V_{GS}/V_{P}]^{2} = 0.8 – 1 = – V_{GS}/V_{P}

0.2V_{P} = V_{GS} = V_{GS} = 1 V = V_{GS} = I_{D}R_{S}

R_{S} = 1/ 6.4 x 10^{-3}

R_{S} = 156.25

R_{S} = 150

- (a,c) In transistor push-pull amplifier, there is no DC present. in output also, there are no even harmonics in output.
- (a,d) coupling capacitor limits the low frequency response as well as blocks DC components.
- (b,d) Negative feedback improves signal to noise ratio at output and reduces distortion.
- (c) Bandwidth of n-stage tuned amplifier with each stage having BW of B is given by

B 2^{1/n} – 1

- (a) f
_{t}= B_{O}F_{B}= 200 x 1 MHz = 200 MHz

f_{a} = f_{b}/1 – a

f_{a} = f_{b} = f_{b}/1 (1 + B) = 1 x 10^{6} x 201

1 – B/1 + B

f_{a} = 201 MHz

- (a)

This is an example of control precision. for V_{I} > – 5, diode D_{2} Conducts and closes the negative feedback loop around the op-amp. a virtual ground therefore will appear at the inverting input termial and the op-amp output will be damped at one diode drop below ground. this negative voltage will keep the diode D_{1} off, and no current will flow in the feedback resistanece R_{2} that is, the rectifier output will be zero.

As V_{I} goes negative the voltage at the inverting input terminal will tend to go negative, causing the voltage at the op-amp output terminal to go to positive. this will cause D_{2} to be reverse biased and bence cut-off. the current through the feedback resistance R_{2} will be equal to the current through the input resistance R_{1} For R_{1} = R_{2} the output voltage

V_{O} = – V_{I} – 5 for V_{I} < – 5 V

Hence, transfer characteristics will be

- (a)

For V_{I} > 1 V, the diode is reverse biased and V = 1 V.

For V_{I} < 1 V, the diode is forward biased and V = V_{I}.

Hence, V = min (V_{I}, 1)

- (a)

The output amplitude

V_{O} = R_{4}/R_{4} + R_{3}(+ V_{sat})

the output frequency f = 1/ 2R_{2}C

Hence, only frequency of V_{O} depends on R_{2}

- (b)

The output voltage

V_{O} – h_{fe}RC/h_{ie} V_{I}

V_{O} – B R_{C}/h_{ie} V_{I}

V_{O} – -150 x 3 x 10^{3}/3 x 10^{3} V_{I}

V_{O} – 150 V_{I}

V_{O} – 150 (A cos 20 t + B sin 10^{6} t)

- (b)

the circuit acts as current mirror.

I_{x} = (_{00}/L)_{2} / (_{00} /L)_{1} I_{bias}

since, both the MOSFETs are identical.

(_{00}/L)_{2} = (_{00}/L)_{1}

Hence, I_{x} = I_{bias}

- (c)

We know that I_{D} = K (V_{GS} – V_{T})^{2}

The transconductance

g_{m} = I_{D}/V_{GS}

g_{m} = 2k (V_{GS} – V_{T})

Hence, g_{m} varies linearly with V_{GS.}

- (b)

From virtual ground concept the potential of A, V_{A} = 0. Let the diode conduct, and current flows as indicated in figure.

I = 0 – (-1) /100 K

I = 1 / 100 K

Given, I_{O} = I_{O} (e^{v/vt} – 1)

1/100 k = 1uA (e^{vo/25 mV} -1)

1/ 100 x 10^{3} x 1 x 10^{-6 }= (e^{vo/25 mv} – 1)

10 + 1 = 1 = e^{vo/25 mv}

V_{O} = 0.1 V

- (b)

V_{O} = – Z_{2}/Z_{1} V_{I}

Z_{2} = R_{2} x 1/SC = R_{2}/1 + sR_{2}C

R_{2} + 1/SC

Z_{1} = R_{1} + sL

V_{O} = R_{2}/ (1 + sR_{2}C) (R_{1} + sL) V_{I}

V_{O}/V_{I} = s^{2}R_{2}LC + s (L + R_{1}R_{2}C) + R_{1}

The standard form of low-pass filter

V_{O}/V_{1} = K /as^{2} + bs + c

hence, op-amp circuit represents low-pass filter.

- (c)

The equivalent transconductance

g_{m} = g_{m1}g_{m2}/g_{m2} + g_{m1}

g_{m2} >> g_{m1} ; because of V_{bias}

hence, dg_{m} – g_{m1}

- (b)

the capacitor is periodically charged and discharged between 2/3 V_{CC} and 1/3 V_{cc}.

V_{C} varies between 1/3 x 9 and 2/3 x 9, i.e., between 3 and 6.

- (d)

the circuit is let V_{A} be the voltage of non-inverting terminal.

applying KCL at node V_{A}, 1.5 – V_{A}/10 + V_{O} – V_{A}/10 + -15 – V_{A}/ 10 = 0

V_{A} = V_{O}/3

As the output of op-amp swings between – 15V to + 15 v. the voltage between the non-inverting input switches from – 5 to + 5 v.

- (c)

V_{A} = 1/1 + 1 (1 V) = 0.5 V (From voltage divided rule)

applying KCL at node B,

1 – V_{B}/1 K = V_{B} – V_{O}/ 2 K

From virtual group concept,

V_{B} = V_{A} = 0.5 V

1 – 0.5 /1 K = 0.5 – V_{O} / 2 K

1 = 0.5 – V_{O}

V_{O} = – 0.5 V

- (b)

Assuming BJT is in active region,

I_{E} = 2 – V_{BE}/R_{E} = 2 – 0.7 / 1 K = 1.3 mA

As B is large,

I_{E} = I_{C} = 1.3 mA

Applying KVL in collector emitter loop,

10 – 10I_{E} – V_{CE} – I_{C} = 0

V_{CE} = – 4.3 K

V_{BC} = V_{BE} – V_{CE}

= 0.7 – (- 4.3) = 5 V

Since, V_{BC} > 0.7 V

transistor in saturation.

- (d)

V_{I}/R = I_{D} = I_{S} e^{vd/vt}

V_{D} = V_{T} IN V_{I}/I_{S}R

Given, when

V_{I} = 2 V

V_{O} = V_{O1}

0 – V_{01} = V_{T} in 2/I_{S}R ……………..(i)

when V_{I} = 4 V

V_{0} = V_{02}

0 – V_{02} = V_{T} in 4/I_{S}R …………….(ii)

subtracting eq. (i) from eq. (ii)

V_{O2} – V_{O1} = V_{T} in 4/I_{S}R – V_{T} in 2/I_{S}R

= V_{T} in 4 /I_{S}R x I_{S}R/2 = V_{T} in 2

- (d)

Given that

(V_{T}) _{p -MOS} = (V_{T}) _{n-MOS }= 1 v

k = (_{00}/L) _{p-MOS} = (_{00}/L) _{n-MOS} = 40 uA/V^{2}

V_{GS} = 2.5 V

I_{D} = K (V_{GS} – V_{T})^{2}

= 40 uA/V^{2} (2.5 – 1)^{2}

I_{D} = 90 uA

- (c)

when V_{I} = 10 V

V_{R} = V_{I} – V_{Z} = 3V

R = 3/200 = 15 mA

V_{0} = V_{Z} + I_{R} 10 = 7.15 V

When V_{I} = 10V

V_{R} = 9V

I_{R} = 9/200 = 45 mA

V_{0} = V_{Z} + 1_{R} x 10 = 7.45 V

Ouput range is 7.15 V – 7.45 V.

- (d)

from concept of virtual ground, the potential at 1 is 10 v. appiying KCL at node 1,

0 – 10 /1 k = – c dv_{c}/dt

10 x 10^{-3} = 1 x 10^{-6} dv_{c}/dt

V_{C} = 10 x 10^{-3}/1 x 10^{-6} | dt

= 10 x 10^{-3}/1 x 10^{-6} x 1 x 10^{-3} = 10 v

- (a)

when 0 < v_{i} < 6V ;

Zener breakdown doesn’t occur and

V_{R} = 0

6V < V_{1} < 12 V,

V_{R} = V_{IN} – 6

- (c)

as collector and base are connected, hence, emitter base junction works as diode.

hence, from diode equation,

I_{D} = I_{S} (e_{v/nvt} – 1)

I_{D} = I_{E}

I_{D }= I_{S} (e_{v/nvt} – 1)

= 10 ^{-13 }(e^{0.7/1 x 26 x 10-3} – 1)

= 49 mA

- (c)

The output voltage due to input bias current of inverting terminal is same and the output voltage due to input bias current of non-inverting terminal is same and of opposite sign as resistance is same at both ports.

(V_{O})_{offset} = I_{Off} R_{2}

hence, by calculating V_{O}, we can measure input offset current only for given circuit.

- (a)

let V_{A} be the input of non-inverting input

V_{O} = (1 + R_{F}/R_{1}) V_{A}

V_{O} = (1+1) V_{A} = 2V_{A}

= 2 x V_{1} x R_{2} = 2V_{1}R_{2}C_{S}/1 + sR_{2}C

R_{2} + 1/SC

At DC (low frequency)

V_{O} = 0

At high frequency output is finite hence it is a high-pass filter.

As the pole exits at 1/R_{2}C.

hence, cut-off frequency

_{00c} = 1/R_{2}C = 1/1 x 10^{3} x 1 x 10^{-6}

= 1000 rad/s

- (d)

In ideal differential amplifier.

common mode gain = – R_{C}/2R_{E}

Differential mode gain = – g_{m}R_{C}

(doesn’t depend on R_{E})

Hence, by increasing R_{E}, the common mode gain will be decrease.

- (c)

From graph threshold voltage V_{T} = 1V

V_{DS} = V_{D} – V_{S} = 5 – 1 = 4 V

V_{GS} = V_{G} – V_{S} = 3 -1 = 2 V

As (V_{DS}) > (V_{GS} – V_{T})

Hence, device is in saturation.

- (b)

Applying KVL in collector base circuit,

V_{CC} – I_{B}R_{B} – V_{BE} – I_{E}R_{E} = 0

I_{E} = I_{C} + I_{B}

= BI_{B} + I_{B} = I_{B} (1 + B)

V_{CC} – I_{B}R_{B} – V_{BE} – I_{B} (1 + B) R_{E} = 0

I_{B} = V_{CC} – V_{BE}/(1 + B) R_{E} + R_{B}

= 40 uA

I_{C} = BI_{B} = 2 mA

collector voltage V_{C} = V_{CC – }I_{C}R_{C}

= 20 – 2 x 10^{-3} x 2 x 10^{3}

= 16 V

- (a)

the maximum current theough load flow when there is maximum input voltage i.e., V_{IN} = 30 V.

Let I_{E} be knee current and I_{L} be load current at V_{in} = 30 V. Applying KVL,

30 – (I_{L} + I_{Z}) x 1 K – 5.8 = 0

= 24.2 mA

I_{L} = 24.2 mA – I_{Z}

Given, I_{Z} = 0.5 mA

(I_{L})_{max} = 24.2 – 0.5

= 23.7 mA

- (b)

When V_{IN} < 0; V_{O} > 0, D_{2} conducts and D_{1} does not conduct

V_{U} = 2 K/2.5 K V_{sat}

= 2 /2.5 x 10 = 8 V

when V_{IN} = 0, V_{O} < 0; D_{1} conducts and D_{2} is in cut-off

V_{I} = 2 K /2.5 K V_{sat} = 2/4 (-10) = – 5 V

- (d)

We know that,

I_{DS} = I_{DSS} (1 – V_{GS}/V_{T})^{2}

1 = I_{DSS} (1 – 2/1)^{2}

I_{DSS} = 1 mA

For V_{GS} = 3 V

I_{DS} = I_{DSS}(1 – V_{GS}/V_{T})^{2} = 1 (1 – 3/1)^{2} = 4 mA

- (c)

Thevenin equivalent of circuit

where, V_{TH} = 5 x( 1/1 + 4) = 1 V

R_{Th} = 4/5 k

applying KVL in base emitter loop,

V_{TH} – R_{Th}I_{B} – V_{BE} = I_{E}R_{E}

I_{E} – I_{C}

I_{C} = 1 mA

V_{CE} = 5 – I_{C}R_{C} – I_{E}R_{C} = 2.5 V

- (d)

Transconductance

g_{m} = |I_{C}| /V_{r} = 1 mA /25 mV

= 0.04 A /V = 40 mA /V

= B = g_{m}r

= r = B/g_{m} = 100 /40 x 10^{-3} = 2.5 k

- (a)

The given circuit is wien bridge oscillator.

^{00}_{0} = 1/RC

2f_{0} = 1/RC

C = 1/2f_{0}R = 1/2 x 10^{3} x 10^{3}

C = 1/2 uF

- (a)

Applying KCL at node A,

V_{S} – V_{A}/R_{1} = V_{A} – V_{O}/R_{1}

V_{S} – V_{A} = V_{A} – V_{O}

2V_{A} – V_{O} = V_{A}

V_{A} = (V_{O} + V_{S}) /2

Applying KCL at node B,

V_{B}/R_{2} + I_{L} + V_{B }– V_{O}/R_{2} = 0

From virtual ground concept,

V_{A} = V_{B}

2 (V_{O} + V_{S}) /2 – V_{O} + I_{L}R_{2} = 0

I_{L} = – V_{S}/R_{2}